MC10E167 - 6-BIT 2:1 MUX-REGISTER
The MC10E167 contains six 2:1 multiplexers followed by D flip-flops with single-ended outputs.
Input data are selected by the Select control, SEL.
The selected data are transferred to the flip-flop outputs by a positive edge on CLK1 or CLK2 (or both).
A HIGH on the Master Reset (MR) pin asynchronous
MC10E167 Features
* 1000 MHz Min. Operating Frequency
* 800 ps Max. Clock to Output
* Single-Ended Outputs
* Asynchronous Master Resets
* Dual Clocks
* PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
* NECL Mode Operating Range: VCC = 0 V with VEE
