NB3L208K - 2.5V / 3.3V Differential 1:8 HCSL Fanout Buffer
The NB3L208K is a differential 1:8 Clock fanout buffer with High *speed Current Steering Logic (HCSL) outputs.
Inputs can directly accept differential LVPECL, LVDS, and HCSL signals.
Single *ended LVPECL, HCSL, LVCMOS, or LVTTL levels are accepted with a proper external Vth reference s
NB3L208K Features
* Maximum Input Clock Frequency > 350 MHz
* 2.5 V ±5% / 3.3 V ±10% Supply Voltage Operation
* 8 HCSL Outputs
* DB800H Compliant
* Individual OE Control Pin for Each Bank of 2 Outputs
* 100 ps Max Output
* to
* Output Skew Performance
