NB3L83948C - 2.5V / 3.3V Differential and LVTTL/LVCMOS 2:1 MUX to 1:12 LVCMOS
The NB3L83948C is a pure 2.5 V / 3.3 V (VDD = VDDO) or mixed mode 3.3 V Core (VDD) / 2.5 V Output (VDDO) clock distribution buffer with the capability to select either a differential LVPECL / LVDS / LVHSTL / SSTL / HCSL or single ended LVCMOS / LVTTL compatible input clock, such as a Primary or a Te
NB3L83948C Features
* 2.5 V / 3.3V (VDD = VDDO) or 3.3 V VDD / 2.5 V VDDO Operation: 2.5 $5%, 2.375 to 2.625 V 3.3 $5%; 3.135 to 3.465 V
* 350 MHz Clock Support
* Accepts LVPECL, LVDS, LVHSTL, SSTL, HCSL, or LVCMOS Clock Inputs
* LVCMOS Compatible Control Inputs
* 12 LVCMOS Clock