NB6L239 Datasheet (ON Semiconductor) - 2.5V / 3.3V Any Differential Clock IN to Differential LVPECL OUT Clock Divider

NB6L239, 2.5V / 3.3V Any Differential Clock IN to Differential LVPECL OUT Clock Divider

The NB6L239 is a high *speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; B1/2/4/8 and B2/4/8/16.

Both divider circuits drive a pair of differential LVPECL outputs.

(More device information on page 7).

The NB6L239 is a member of the ECLinPS MA

NB6L239 Features

* Maximum Clock Input Frequency, 3.0 GHz

* CLOCK Inputs Compatible with LVDS/LVPECL/CML/HSTL/HCSL

* EN, MR, and SEL Inputs Compatible with LVTTL/LVCMOS

* Rise/Fall Time 65 ps Typical

* < 10 ps Typical Output

* to

* Output Skew

* Example: 62