NB7V585M - Differential1-to-6 CML clock/data distribution
Multi *Level Inputs w/ Internal Termination The NB7V585M is a differential 1 *to *6 CML clock/data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin.
The INx/INx inputs incorporate internal 50 W termination resistors and will accept LVPEC
NB7V585M Features
* SIMPLIFIED LOGIC DIAGRAM VCC Q0 Q0 SEL VREFAC0 IN0 VT0 IN0 0 Q1 Q1 Q2 Q2 IN1 VT1 IN1 VREFAC1 VCC GND 1 Q3 Q3 Q4 Q4 Q5 Q5 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. © Semiconductor Components Industries
