MN38662S Datasheet - Panasonic Semiconductor

MN38662S NTSC-Compatible CCD Video Signal Delay Element

CCD Delay Line Series MN38662S NTSC-Compatible CCD Video Signal Delay Element Overview The MN38662S is a CCD signal delay element for video signal processing applications. It contains such components as a threefold-frequency circuit, a shift register clock driver, charge I/O blocks, two CCD analog shift registers switchable between 681 and 605 stages, a clamp bias circuit, resampling output amplifiers, and booster circuits. When the switch input is "L" level, the MN38662S samples the input usin.

MN38662S Features

* Single 4.8 V power supply Choice of camera and VCR modes, so that both the camera and VCR portions of a video camera with 510 horizontal pixels can use the same MN38662S for signal processing Applications Video cameras 1 MN38662S Block Diagram CCD Delay Line Series VGC1 16 V DD2 17 V SS2 10

MN38662S_PanasonicSemiconductor.pdf