PLL103-11 - Low Skew Buffers

Product Overview

PhaseLink Corporation

Datasheet Details

Part number	PLL103-11
Manufacturer	PhaseLink Corporation
File Size	178.80 KB
Description	Low Skew Buffers
Datasheet	PLL103-11 Datasheet
Additional preview pages of the PLL103-11 datasheet.

Product details

Description

Name SDRAM (0:5) SDRAM (6:11) SDRAM 12 www.DataSheet4U.com BUF_IN Number 2,3,6,7,10,11 18,19,22, 23,26,27 12 9 14 15 1,5,20,24,28 13 4,8,17,21,25 16 Type O O O I B I P P P P SDRAM Byte0 Clock outputs.SDRAM Byte1 Clock outputs.SDRAM Byte2 Clock outputs.Description Input for fanout buffers SDRAM (0:12).Serial data inputs for serial interface port.3.3V Power supply for SDRAM buffer.3.3V Power supply for I2C circuitry.Ground for SDRAM buffer.Power supply for I2C circuitry.SDATA SCLK V

Features

Generates 13 copies of High-speed clock inputs. Supports up to three SDRAM DIMMS synchronous clocks.
Supports 2-wire I2C serial bus interface with readback.
50% duty cycle with low jitter.
Less than 5ns delay. www. DataSheet4U. com.
Skew between any outputs is less than 250 ps.
Tri-state pin for testing.
Frequency up to 150 MHz.
3.0V-3.7V Supply range.
Available in 28-pin 300mil SOIC package.
PIN CO.

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Other Datasheets by PhaseLink Corporation

PLL103-01 - Low Skew Buffer
PLL103-02 - DDR SDRAM Buffer
PLL103-03 - DDR SDRAM Buffer
PLL103-04 - 1-to-4 Clock Distribution Buffer
PLL103-05 - 1-to-5 Clock Distribution Buffer
PLL103-06 - DDR SDRAM Buffer

Published: Oct 28, 2008 |