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74HCT73 - Dual JK flip-flop

74HCT73 Description

74HC73 Dual JK flip-flop with reset; negative-edge trigger Rev.03 * 12 November 2004 Product data sheet 1.General .
The 74HC73 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL).

74HCT73 Features

* s Low-power dissipation s Complies with JEDEC standard no. 7A s ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. s Multiple package options s Specified from
* 40 °C to +80 °C and from
* 40 °C to +125 °C. Philips Semiconductors 74HC73 Dual JK

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