SSTV16859 Datasheet - Philips

SSTV16859 2.5 V 13-bit to 26-bit SSTL_2 registered buffer

The SSTV16859 is a 13-bit to 26-bit SSTL_2 registered driver with differential clock inputs, designed to operate between 2.3 V and 2.7 V. All inputs are compatible with the JEDEC standard for SSTL_2 with VREF normally at 0.5 *VDD, except the LVCMOS reset (RESET) input. All outputs are SSTL_2, Cla.

SSTV16859 Features

* Stub-series terminated logic for 2.5 V VDD (SSTL_2)

* Optimized for stacked DDR (Double Data Rate) SDRAM applications DDR (Double Data Rate) SDRAM and SDRAM II Memory Modules. Different from traditional SDRAM, DDR SDRAM transfers data on both clock edges (rising and falling), thu

SSTV16859-Philips.pdf