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HYB18TC1G800BF Datasheet - Qimonda

1-Gbit Double-Data-Rate-Two SDRAM

HYB18TC1G800BF Features

* The 1-Gbit Double-Data-Rate-Two SDRAM offers the following key features:

* Off-Chip-Driver impedance adjustment (OCD) and On

* 1.8 V ± 0.1 V Power Supply 1.8 V ± 0.1 V (SSTL_18) compatible I/O Die-Termination (ODT) for better signal quality.

* DRAM organizations with 8 and 16

HYB18TC1G800BF General Description

latched at the cross point of differential clocks (CK rising and CK falling). All I/Os are synchronized with a single ended DQS or differential DQS-DQS pair in a source synchronous fashion. A 17 bit address bus for ×8 organised components and a 16 bit address bus for ×16 components is used to convey.

HYB18TC1G800BF Datasheet (3.54 MB)

Preview of HYB18TC1G800BF PDF

Datasheet Details

Part number:

HYB18TC1G800BF

Manufacturer:

Qimonda

File Size:

3.54 MB

Description:

1-gbit double-data-rate-two sdram.
July 2007 HYB18T C1G 80 0 BF HYB18T C1G 16 0 BF 1-Gbit Double-Data-Rate-Two SDRAM DDR2 SDRAM RoHS Compliant Products Internet Data Sheet Rev. 1.21 .

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TAGS

HYB18TC1G800BF 1-Gbit Double-Data-Rate-Two SDRAM Qimonda

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