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HYB25D512400BF, HYB25D512400BC Datasheet - Qimonda

Datasheet Details

Part number:

HYB25D512400BF, HYB25D512400BC

Manufacturer:

Qimonda

File Size:

768.99 KB

Description:

512-Mbit Double-Data-Rate SDRAM

Note:

This datasheet PDF includes multiple part numbers: HYB25D512400BF, HYB25D512400BC.
Please refer to the document for exact specifications by model.

Features

* Double data rate architecture: two data transfers per clock cycle

* Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver

* DQS is edge-aligned with data for reads and is center-aligned with data for writes

HYB25D512400BC_Qimonda.pdf

This datasheet PDF includes multiple part numbers: HYB25D512400BF, HYB25D512400BC. Please refer to the document for exact specifications by model.
HYB25D512400BF Datasheet Preview Page 2 HYB25D512400BF Datasheet Preview Page 3

HYB25D512400BF, HYB25D512400BC, 512-Mbit Double-Data-Rate SDRAM

The 512-Mbit Double-Data-Rate SDRAM is a high-speed CMOS, dynamic random-access memory containing 536,870,912 bits.

It is internally configured as a quad-bank DRAM.

The 512-Mbit Double-Data-Rate SDRAM uses a doubledata-rate architecture to achieve high-speed operation.

The double data rate architec

September 2006 HYB25D512[40/80/16]0B[C/T](L) HYB25D512[40/80/16]0B[E/F](L) 512-Mbit Double-Data-Rate SDRAM DDR SDRAM Internet Data Sheet Rev.

1.63 HYB25D512[40/80/16]0B[C/T](L), HYB25D512[40/80/16]0B[E/F](L) Revision History: 2006-09, Rev.

1.63 Page Subjects (major changes since last revision) All Qimonda update All Adapted internet edition Previous Revision: 2005-10, Rev.

1.62 Internet Data Sheet HYB25D512[40/16/80]0B[E/F/C/T](L) Double-Data-Rate SDRAM We Listen to Your Comments Any

HYB25D512400BF Distributor

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