HYB25D512400DE 512M DDR SDRAM

Qimonda

Description

July 2008 www.DataSheet4U.com HYB25D512400D[E/F/T] HY[B/I]25D512800D[C/E/F/T](L) HY[B/I]25D512160D[C/E/F/T](L) 5 1 2 - M b i t D o u b l e - D a t a.
Read and write accesses to the DDR SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations i.

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Datasheet Specifications

Part number: HYB25D512400DE
Manufacturer: Qimonda
File Size: 2.42 MB
Datasheet: HYB25D512400DE_Qimonda.pdf
Description: 512M DDR SDRAM

Features

* Double data rate architecture: two data transfers per clock cycle Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver DQS is edge-aligned with data for reads and is center-aligned with data for writes Differential clock inputs (CK and

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HYB25D512400AT HYB25D512400BC HYB25D512400BE HYB25D512400BT HYB25D512160AT HYB25D512160BC

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HYB25D512400DE 512M DDR SDRAM Qimonda

Qimonda HYB25D512400DE-like datasheet