QL3004E Datasheet - QuickLogic Corporation

QL3004E PLD Gate pASIC 3 FPGA Combining High Performance and High Density

4/( S$6,& )3 $ 'DWD 6KHHW 8VDEOH 3/' DWH S$6,& )3 $ &RPELQLQJ +LJK 3HUIRUPDQFH DQG +LJK 'HQVLW 'HYLFH +LJKOLJKWV +LJK 3HUIRUPDQFH www.DataSheet4U.com 300 MHz 16-bit +LJK 'HQVLW )RXU /RZ6NHZ 'LVWULEXWHG 1HWZRUNV Two array clock/control networks available 4,000 Usable PLD Gates with 82 I/Os Counters, 400 MHz Datapaths 0.35 µm four-layer metal non-volatile CMOS process for smallest die sizes (DVWR8VH )DVW 'HYHORSPHQW &FOHV 100% routable with 10.

QL3004E_QuickLogicCorporation.pdf

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Datasheet Details

Part number:

QL3004E

Manufacturer:

QuickLogic Corporation

File Size:

220.07 KB

Description:

Pld gate pasic 3 fpga combining high performance and high density.

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QL3004E QL3004E PLD Gate pASIC FPGA Combining High Performance and High Density QuickLogic Corporation

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