QL3012 Datasheet (QuickLogic)

QL3012, qASIC 3 FPGA

U 4 QL3012 pASIC 3 FPGA Data Sheet t e e h S 12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance a t a and High Density Eight Low-Skew Distributed Device .D Highlights w Networks w Two array clock/control networks available Performance & High Density wHigh to the logic cell flip-flop clock, set and reset 12,000 Usable PLD Gates with 118 I/Os 300 MHz 16-bit Counters, m o c 400 MHz Datapaths

QL3012 Features

* Kt Graphs Voltage Factor vs. Supply Voltage 1.1000 1.0800 1.0600 1.0400 Kv 1.0200 1.0000 0.9800 0.9600 0.9400 0.9200 3 3.1 3.2 3.3 3.4 3.5 3.6 Supply Voltage (V) Figure 3: Voltage Factor vs. Supply Voltage Temperature Factor vs. Operating Temperature 1.15 1.10 1.05 1.00 0.95 0.90 0.85 -60 -40 -