IDT23S05E Datasheet (Renesas) - 3.3V ZERO DELAY CLOCK BUFFER

IDT23S05E, 3.3V ZERO DELAY CLOCK BUFFER

The IDT23S05E is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications.

The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 200MHz.

The IDT23S05E is an 8-pin ve

IDT23S05E Features

* Phase-Lock Loop Clock Distribution

* 10MHz to 200MHz operating frequency

* Distributes one clock input to one bank of five outputs

* Zero Input-Output Delay

* Output Skew < 250ps

* Low jitter