R5F564M

MCUs

Renesas

R5F564M Features

* Datasheet RX64M Group Renesas MCUs R01DS0173EJ0100 Rev.1.00 120-MHz 32-bit RX MCU, on-chip FPU, 240 DMIPS, up to 4-MB flash memory, Jul 31, 2014 512-KB SRAM, various communications interfaces including IEEE 1588-compliant Ethernet MAC, full-speed USB 2.0 with battery charging, SD host inter

R5F564M General Description

* Maximum operating frequency: 120 MHz
* 32-bit RX CPU (RXv2)
* Minimum instruction execution time: One instruction per state (cycle of the system clock)
* Address space: 4-Gbyte linear
* Register set of the CPU General purpose: Sixteen 32-bit registers Control: Ten 32-bit regist.

R5F564M Datasheet (2.19 MB)