K7P323688M - 1Mx36 & 2Mx18 SRAM
Pin Name K, K SAn DQn SS SW SWa SWb SWc SWd M 1 , M2 G Pin Description Differential Clocks Synchronous Address Input Bi-directional Data Bus Synchronous Select Synchronous Global Write Enable Synchronous Byte a Write Enable Synchronous Byte b Write Enable Synchronous Byte c Write Enable Synchronous
K7P323688M K7P321888M 1Mx36 & 2Mx18 SRAM www.DataSheet4U.com 32Mb M-die LW SRAM Specification 119BGA with Pb & Pb-Free (RoHS compliant) INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
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K7P323688M Features
* 1Mx36 or 2Mx18 Organizations.
* 1.8V VDD/1.5V or 1.8V VDDQ.
* HSTL Input and Output Levels.
* Differential, HSTL Clock Inputs K, K.
* Synchronous Read and Write Operation
* Registered Input and Registered Output
* Internal Pipeline Latches to
