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K7P401822B

SRAM

K7P401822B Features

* 128Kx36 or 256Kx18 Organizations.

* 3.3V VDD, 2.5/3.3V VDDQ.

* LVTTL Input and Output Levels.

* Differential, PECL clock / Single ended or differential LVTTL clock Inputs

* Synchronous Read and Write Operation.

* Registered Input and Registered Outpu

K7P401822B General Description

Pin Name K, K SAn DQn SS SW SWa SWb SWc SWd M1, M2 Pin Description Differential Clocks Synchronous Address Input Bi-directional Data Bus Synchronous Select Synchronous Global Write Enable Synchronous Byte a Write Enable Synchronous Byte b Write Enable Synchronous Byte c Write Enable Synchronous By.

K7P401822B Datasheet (277.23 KB)

Preview of K7P401822B PDF

Datasheet Details

Part number:

K7P401822B

Manufacturer:

Samsung

File Size:

277.23 KB

Description:

Sram.
K7P403622B K7P401822B 128Kx36 & 256Kx18 SRAM Document Title 128Kx36 & 256Kx18 Synchronous Pipelined SRAM Revision History Rev. No. Rev. 0.0 Histo.

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K7P401822B SRAM Samsung

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