K7P403623B_Samsungsemiconductor.pdf
Datasheet Details
Part number:
K7P401823B, K7P403623B
Manufacturer:
Samsung semiconductor
File Size:
344.45 KB
Description:
128kx36 & 256kx18 sram.
Note:
This datasheet PDF includes multiple part numbers: K7P401823B, K7P403623B.
Please refer to the document for exact specifications by model.
K7P401823B, K7P403623B, 128Kx36 & 256Kx18 SRAM
Pin Name K, K SAn DQn SW SWa SWb SWc SWd ZZ Pin Description Differential Clocks(PECL or LVTTL Level) Synchronous Address Input Bi-directional Data Bus Synchronous Global Write Enable Synchronous Byte a Write Enable Synchronous Byte b Write Enable Synchronous Byte c Write Enable Synchronous Byte d Wr
K7P403623B K7P401823B Document Title 128Kx36 & 256Kx18 Synchronous Pipelined SRAM 128Kx36 & 256Kx18 SRAM Revision History Rev.
No.
Rev.
0.0 Rev.
0.1 History - Preliminary specification release - Update DC CHARACTERISTICS x36 : IDD6 : TBD -> 300, IDD65 -> 290, IDD7 -> 280.
x18 : IDD6 : TBD -> 290, IDD65 -> 280, IDD7 -> 270.
- Change simbol in DC CHARACTERISTICS IDD6, IDD65, IDD7 -> IDD65, IDD70, IDD75 - Final Version - Add Single ended differential clock on clock comment.
Draft Date Oct.
2002
K7P401823B Features
* 128Kx36 or 256Kx18 Organizations. 3.3V VDD, 2.5/3.3V VDDQ. LVTTL 2.5/3.3V Input and Output Levels. Differential, PECL clock / Single ended or differential LVTTL clock Inputs Synchr
📁 Related Datasheet
📌 All Tags
