K4M51323LC-F - Mobile-SDRAM
The K4M51323LC is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology.
Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every c
K4M51323LC-F Features
* VDD/VDDQ = 2.5V/2.5V
* LVCMOS compatible with multiplexed address.
* Four banks operation.
* MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).
* EMRS cycle with
