K4M513233C Datasheet (Samsung semiconductor) - 4M x 32Bit x 4 Banks Mobile SDRAM

K4M513233C, 4M x 32Bit x 4 Banks Mobile SDRAM

The K4M513233C is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every c

K4M513233C Features

* 3.0V & 3.3V power supply.

* LVCMOS compatible with multiplexed address.

* Four banks operation.

* MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).

* EMRS cycle