K4S641632H-UC75 - 64Mb H-die SDRAM Specification 54 TSOP-II
The K4S640432H / K4S640832H / K4S641632H is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 4 bits, / 4 x 2,097,152 words by 8 bits, / 4 x 1,048,576 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology.
Synchronous design allows prec
SDRAM 64Mb H-die (x4, x8, x16) CMOS SDRAM 64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant) Revision 1.3 August 2004 Samsung Electronics reserves the right to change products or specification without notice.
Rev.
1.3 August 2004 SDRAM 64Mb H-die (x4, x8, x16) Revision History Revision 1.0 (September, 2003) Finalized CMOS SDRAM Revision 1.1 (October, 2003) Deleted speed -7C and AC parameter notes 5.
Revision 1.2 (May, 2004) Added Note 5.
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K4S641632H-UC75 Features
* JEDEC standard 3.3V power supply
* LVTTL compatible with multiplexed address
* Four banks operation
* MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)
* All inputs are
