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K4X56163PG-FG - 16M x16 Mobile-DDR SDRAM

This page provides the datasheet information for the K4X56163PG-FG, a member of the K4X56163PG-L 16M x16 Mobile-DDR SDRAM family.

Description

Clock : CK and CK are differential clock inputs.

All address and control input signals are sampled on the crossing of the positive edge of CK and negative edge of CK.

Internal clock signals are derived from CK/CK.

Features

  • Mobile-DDR SDRAM.
  • 1.8V power supply, 1.8V I/O power.
  • Double-data-rate architecture; two data transfers per clock cycle.
  • Bidirectional data strobe(DQS).
  • Four banks operation.
  • Differential clock inputs(CK and CK).
  • MRS cycle with address key programs - CAS Latency ( 2, 3 ) - Burst Length ( 2, 4, 8, 16 ) - Burst Type (Sequential & Interleave) - Partial Self Refresh Type ( Full, 1/2, 1/4 Array ) - Output Driver Strength Control ( Full, 1/2, 1/4,.

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Datasheet preview – K4X56163PG-FG

Datasheet Details

Part number K4X56163PG-FG
Manufacturer Samsung semiconductor
File Size 256.07 KB
Description 16M x16 Mobile-DDR SDRAM
Datasheet download datasheet K4X56163PG-FG Datasheet
Additional preview pages of the K4X56163PG-FG datasheet.

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Full PDF Text Transcription

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K4X56163PG - L(F)E/G 16M x16 Mobile-DDR SDRAM FEATURES Mobile-DDR SDRAM • 1.8V power supply, 1.8V I/O power • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Four banks operation • Differential clock inputs(CK and CK) • MRS cycle with address key programs - CAS Latency ( 2, 3 ) - Burst Length ( 2, 4, 8, 16 ) - Burst Type (Sequential & Interleave) - Partial Self Refresh Type ( Full, 1/2, 1/4 Array ) - Output Driver Strength Control ( Full, 1/2, 1/4, 1/8 ) • Internal Temperature Compensated Self Refresh • Deep Power Down Mode www.DataSheet4U.com • All inputs except data & DM are sampled at the positive going edge of the system clock(CK). • Data I/O transactions on both edges of data strobe, DM for masking.
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