K7I163682B - (K7I163682B / K7I161882B) 1Mx18-bit DDRII CIO b2 SRAM

Samsung semiconductor

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Datasheet Details

Part number	K7I163682B
Manufacturer	Samsung semiconductor
File Size	404.76 KB
Description	(K7I163682B / K7I161882B) 1Mx18-bit DDRII CIO b2 SRAM
Datasheet	K7I163682B_Samsungsemiconductor.pdf

K7I163682B Product details

Description

Input Clock Input Clock for Output Data Output Echo Clock DLL Disable when low Burst Count Address Inputs Address Inputs Data Inputs Outputs Read, Write Control Pin, Read active when high Synchronous Load Pin, bus Cycle sequence is to be defined when low Block Write Control Pin,active when low Input Reference Voltage Output Driver Impedance Control Input Power Supply ( 1.8 V ) Output Power Supply ( 1.5V or 1.8V ) Ground JTAG Test Mode Select JTAG Test Data Input JTAG Test Clock JTAG Test Data Ou

Features

1.8V+0.1V/-0.1V Power Supply.
DLL circuitry for wide output data valid window and future freguency scaling.
I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/-0.1V for 1.8V I/O.
Pipelined, double-data rate operation.
Common data input/output bus.
HSTL I/O.
Full data coherency, providing most current data.
Synchronous pipeline read with self timed late write.
Registered address, control and data inp.

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Published: Jul 14, 2007 |