K7I321882M

1Mx36 & 2Mx18 DDRII CIO b2 SRAM

Samsung semiconductor

K7I321882M Features

* and the timing waveforms regarding the burst controllability. - Recommended DC operating conditions for Clock added. - AC test conditions for V DDQ=1.8V and Single ended clock added. (AC Test Conditions 2) - Package thermal characteristics added. - Add-HC35 part(Part Number, Idd, AC Characteristics)

K7I321882M General Description

Pin Name K, K SA SA0, SA1 DQ CQ, CQ B1 B2 B3 G LBO Pin Description Differential Clocks Synchronous Address Input Synchronous Burst Address Input (SA 0 = LSB) Synchronous Data I/O Differential Output Echo Clocks Load External Address Burst R/W Enable Single/Double Data Selection Asynchronous Output E.

K7I321882M Datasheet (270.13 KB)

K7I321882M Datasheet Preview — Preview of K7I321882M PDF

Datasheet Details

Part number:

K7I321882M

Manufacturer:

Samsung semiconductor

File Size:

270.13 KB

Description:

1mx36 & 2mx18 ddrii cio b2 sram.
K7D803671B K7D801871B Document Title 8M DDR SYNCHRONOUS SRAM 256Kx36 & 512Kx18 SRAM Revision History Rev No. Rev. 0.0 Rev. 0.1 Rev. 0.2 History -Ini.

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K7I321882M 1Mx36 2Mx18 DDRII CIO SRAM Samsung semiconductor

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K7I321882M Features

K7I321882M General Description

Datasheet Details

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