M366S3323ETS-C7A Datasheet - Samsung semiconductor

M366S3323ETS-C7A (M3xxSxxxxETx-C7A) SDRAM Unbuffered Module

Pin Name A0 ~ A11 BA0 ~ BA1 DQ0 ~ DQ63 CB0 ~ CB7 CLK0 ~ 3 CKE0, CKE1 CS0 ~ CS3 RAS CAS WE Select bank Data input/output Check bit (Data-in/data-out) Clock input Clock enable input Chip select input Row address strobe Colume address strobe Write enable Function Address input (Multiplexed) VDD VSS VRE.

64MB, 128MB, 256MB Unbuffered DIMM SDRAM SDRAM Unbuffered Module 168pin Unbuffered Module based on 128Mb E-die 62/72-bit Non ECC/ECC Revision 1.3 February. 2004 Rev. 1.3 February 2004 64MB, 128MB, 256MB Unbuffered DIMM Revision History Revision 1.0 (November., 2002) - First release Revision 1.1 (May, 2003) - Merged Spec. Revision 1.2 (June, 2003) - Correct Typo. Revision 1.3 (February, 2004) - Correct Typo. SDRAM Rev. 1.3 February 2004 64MB, 128MB, 256MB Unbuffered DIMM 168Pin Unbuffered.

M366S3323ETS-C7A Features

* 4 DQ5 DQ6 DQ7 CS U4 Serial PD SCL 47KΩ WP A0 SDA A1 A2 SA0 SA1 SA2 A0 ~ A11, BA0 & 1 RAS CAS WE CKE0 10Ω DQn VDD Vss

* SDRAM U0 ~ U8 SDRAM U0 ~ U8 SDRAM U0 ~ U8 SDRAM U0 ~ U8 SDRAM U0 ~ U8 Every DQpin of SDRAM CLK1/3 One 0.1uF and one 0.22 uF Cap. To all SD

M366S3323ETS-C7A_Samsungsemiconductor.pdf