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M470L3224FU0 Datasheet - Samsung semiconductor

M470L3224FU0 DDR SDRAM SODIMM

Pin Name A0 ~ A12 BA0 ~ BA1 DQ0 ~ DQ63 DQS0 ~ DQS8 CK0,CK0 ~ CK2, CK2 CKE0~CKE1 CS0~CS1 RAS CAS WE CB0 ~ CB7 Function Address input (Multiplexed) Bank Select Address Data input/output Data Strobe input/output Clock input Clock enable input Chip select input Row address strobe Column address strobe W.

128MB, 256MB SODIMM Pb-Free DDR SDRAM DDR SDRAM SODIMM 200pin Unbuffered SODIMM based on 256Mb F-die 64 / 72-bit (Non ECC / ECC) 66 TSOP(II) with Pb-Free (RoHS compliant) Revision 1.2 Oct. 2004 Revision 1.2 Oct. 2004 128MB, 256MB SODIMM Pb-Free Revision History Revision 1.0 (February, 2004) - First release Revision 1.1 (March, 2004) - Corrected package dimension. Revision 1.2 (Oct, 2004) - Corrected typo. DDR SDRAM Revision 1.2 Oct. 2004 128MB, 256MB SODIMM Pb-Free 200Pin Non ECC / ECC S.

M470L3224FU0 Features

* REF VSS D0 - D4 D0 - D4 Notes: 1. DQ-to-I/O wiring is shown as recommended but may be changed. 2. DQ

M470L3224FU0 Datasheet (264.46 KB)