S3P72I9 Datasheet (Samsung semiconductor) - The S3C72I9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M

S3P72I9, The S3C72I9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M

Table 1-1.

S3C72I9 Pin Descriptions Pin Name P0.0 P0.1 P0.2 P0.3 Pin Type I/O Description 4-bit I/O port.

1-bit and 4-bit read/write and test are possible.

Individual pins are software configurable as input or output.

Individual pins are software configurable as opendrain or push-pull output.

4-bit

S3C72I9/P72I9 PRODUCT OVERVIEW 1 OVERVIEW PRODUCT OVERVIEW The S3C72I9 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).

With an up-to-896-dot LCD direct drive capability, 8-bit timer/counter 0, 16-bit timer/counter 1, and serial I/O, the S3C72I9 offers an excellent design solution for a wide variety of applications which require LCD functions.

Up to 39 pins of the 100-pin QFP package c

S3P72I9 Features

* SUMMARY Memory

* 8,192 × 4-bit RAM (excluding LCD display RAM) 32,768 × 8-bit ROM

* 39 I/O Pins

* I/O: 35 pins Input only: 4 pins Interrupts

* LCD Controller/Driver

* 56 segments and 16 common terminals 8 and 1