S5T8554B Datasheet - Samsung semiconductor

S5T8554B 1 CHIP CODEC

VBB = *5V ± 5% Analog ground. Analog output of the receive power Amp. VCC = +5 V ± 5% Receive frame sync pulse. 8kHz pulse train PCM data input. Logic input which selects either 1.536MHz/1.544MHz or 2.048MHz for master clock in normal operation and BCLKX is used for both TX and RX directions.

1 CHIP CODEC S5T8554B/7B INTRODUCTION 16-CERDIP The S5T8554B/7B are single-chip PCM encoders and decoders (PCM CODECs) and PCM line filters. These devices provide all the functions required to interface a full-duplex voice telephone circuit with a time-division-multiplex (TDM) system. These devices are designed to perform the transmit encoding and receive decoding as well as the transmit and receive filtering functions in PCM system. They are intended to be used at the analog termination of a .

S5T8554B Features

* Complete CODEC and filtering system Meets or exceeds AT&T D3/D4 and CCITT specifications µ-Law: S5T8554B, A-Law: S5T8557B On-chip auto zero, sample and hold, and precision voltage references Low power dissipation: 60mW (operating)

S5T8554B Datasheet (125.01 KB)