S5T8555 Datasheet - Samsung semiconductor

S5T8555 TIME SLOT ASSIGNMENT CIRCUIT

A Transmit frame sync output which is normally low, and goes active-high for 8 cycles of BCLK when a valid transmit time slot assignment is made. A Receive frame sync output which is normally low, and goes active-high for 8 cycles of BCLK when a valid receive time slot assignment is made. This pin.

S5T8555 Features

* Single, 5V operation Low power consumption: 5mW Controls four 1 CHIP CODEC Independent transmit and receive frame syncs channel unidirectional mode Up to 64 time slots per frame Compatible with S5T8554B/7B CODECs TTL and

S5T8555 Datasheet (85.29 KB)