S5T8809 Datasheet - Samsung semiconductor

S5T8809 PLL FREQUENCY SYNTHESIZER FOR PAGER

Pin No 1 2 3 4 5 6 7 8 9 Symbol OSCI OSCO VDD2 FL PDO VSS Fin VDD1 PBC Description These input / output pins generate the reference frequency. In case of OSCI Pin, external reference frequency can be used through the AC coupling. The highest potential supply terminal that can be supplied up to 2.0 ~.

PLL FREQUENCY SYNTHESIZER FOR PAGER S5T8809 INTRODUCTION S5T8809 is a superior low-power-programmable PLL frequency synthesizer which can be used in high performance / Simple application for a Wide Area Pager system. S5T8809 consists of 2 kinds of divider block including a 19-bit Shift register, 16/18-bit Latch, 13/15bits R-counter and 16/18-bit NCounter, 32/33 Prescaler, and a phase detector block including a Phase detector, Lock detector and a Charge pump. S5T8809 also has a battery saving m.

S5T8809 Features

* Maximum operating frequency: 330MHz @ 300mVP-P, VDD1 = 1.0V, VDD2 = 3.0V On-chip reference oscillator supports external crystal which oscillates up to 23MHz Superior supply current:

* FFIN = 310MHz, IDD1 = 0.8mA (Typ.) @ VDD1 = 1.0V, VDD2 = 3.0V Operating voltag

S5T8809 Datasheet (123.25 KB)