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K6R4016C1D - CMOS SRAM

Description

The K6R4016C1D is a 4,194,304-bit high-speed Static Random Access Memory organized as 262,144 words by 16 bits.

The K6R4016C1D uses 16 common input and output lines and has an output enable pin which operates faster than address access time at read cycle.

Features

  • Fast Access Time 10ns(Max. ).
  • Low Power Dissipation Standby (TTL) : 20mA(Max. ) (CMOS) : 5mA(Max. ) Operating K6R4016C1D-10 : 65mA(Max. ).
  • Single 5.0V± 10 % Power Supply.
  • TTL Compatible Inputs and Outputs.
  • Fully Static Operation - No Clock or Refresh required.
  • Three State Outputs.
  • Center Power/Ground Pin Configuration.
  • Data Byte Control : LB : I/O1~ I/O8, UB : I/O9~ I/O16.
  • Standard Pin Configuration K6R4016C1D-J : 44-S.

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Full PDF Text Transcription

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PRELIMPreliminaryPPPPPPPPPINARY K6R4016C1D Document Title 256Kx16 Bit High Speed Static RAM(5.0V Operating). Operated at Commercial and Industrial Temperature Ranges. CMOS SRAM Revision History Rev No. Rev. 0.0 Rev. 0.1 Rev. 0.2 History Initial release with Preliminary. Package dimension modify on page 11. Change Icc, Isb and Isb1 Item ICC(Commercial) 10ns 12ns 15ns 10ns 12ns 15ns Previous 90mA 80mA 70mA 115mA 100mA 85mA 30mA 10mA Current 65mA 55mA 45mA 85mA 75mA 65mA 20mA 5mA Draft Data September. 7. 2001 Septermber.28. 2001 November, 3, 2001 Remark Preliminary Preliminary Preliminary ICC(Industrial) ISB ISB1(Normal) Rev. 0.3 1. Correct AC parameters : Read & Write Cycle 2. Corrrect Power part : Delete "P-Industrial,Low Power" part 3. Delete Data Retention Characteristics 1.
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