HYB514171BJ-50 Datasheet - Siemens

HYB514171BJ-50 256k x 16-Bit Dynamic RAM

50 ns 256k × 16 DRAM 60 ns 256k × 16 DRAM Pin Names A0 - A8 RAS UCAS, LCAS WE OE I/O1 - I/O16 Address Inputs Row Address Strobe Column Address Strobe Read/Write Input Output Enable Data Input/Output Power Supply (+ 5 V) Ground (0 V) No Connection VCC VSS N.C. Semiconductor Group 2 1998-10-01 H.

256k × 16-Bit Dynamic RAM HYB 514171BJ-50/-60 Advanced Information 262 144 words by 16-bit organization 0 to 70 °C operating temperature Fast access and cycle time RAS access time: 50 ns (-50 version) 60 ns (-60 version) CAS access time: 15ns (-50, -60 version) Cycle time: 95 ns (-50 version) 110 ns (-60 version) Fast page mode cycle time 35 ns (-50 version) 40 ns (-60 version) Single + 5.0 V (± 10 %) supply with a built-in VBB generator Low Power dissip.

HYB514171BJ-50 Features

* include single + 5 V (± 10 %) power supply, direct interfacing with high performance logic device families such as Schottky TTL. Semiconductor Group 1 1998-10-01 HYB 514171BJ-50/-60 256k × 16 DRAM Ordering Information Type HYB 514171BJ-50 HYB 514171BJ-60 Truth Table RAS H L L L L L L L L LCAS H

HYB514171BJ-50 Datasheet (181.39 KB)