HYB514175BJ-50 Datasheet - Siemens

HYB514175BJ-50 256k x 16-Bit EDO-DRAM

50 ns 256k × 16 EDO-DRAM 55 ns 256k × 16 EDO-DRAM 60 ns 256k × 16 EDO-DRAM Pin Names A0 - A8 RAS UCAS, LCAS WE OE I/O1 -I/O16 Address Inputs Row Address Strobe Column Address Strobe Read/Write Input Output Enable Data Input/Output Power Supply (+ 5 V) Ground (0 V) No Connection VCC VSS N.C. Semic.

256k × 16-Bit EDO-DRAM HYB 514175BJ-50/-55/-60 Advanced Information 262 144 words by 16-bit organization 0 to 70 °C operating temperature Fast access and cycle time RAS access time: 50 ns (-50 version) 55 ns (-55 version) 60 ns (-60 version) CAS access time: 13 ns (-50 & -55 version) 15 ns (-60 version) Cycle time: 89 ns (-50 version) 94 ns (-55 version) 104 ns (-60 version) Hyper page mode (EDO) cycle time 20 ns (-50 & -55 version) 25 ns (-60 version) H.

HYB514175BJ-50 Features

* include single + 5 V (± 10 %) power supply, direct interfacing with high performance logic device families such as Schottky TTL. Ordering Information Type HYB 514175BJ-50 HYB 514175BJ-55 HYB 514175BJ-60 Truth Table RAS H L L L L L L L L LCAS H H L H L L H L L UCAS H H H L L H L L L WE H H H H H L L

HYB514175BJ-50_SiemensSemiconductorGroup.pdf