MGP3006X6 Datasheet (Siemens) - GHz PLL with I2C Bus and Four Chip Addresses

MGP3006X6, GHz PLL with I2C Bus and Four Chip Addresses

Tuning Section UHF/VHF REF The tuner signal is capacitively coupled at the UHF/VHF-input and subsequently amplified.

The reference input REF should be decoupled to ground using a capacitor of low series inductance.

The signal passes through an asynchronous divider with a fixed ratio of P = 8, an adj

MGP3006X6 Features

* q q q q q q 1-chip system for MPU-control (I2C Bus) 4 programmable chip addresses Short pull-in time for quick channel switch-over and optimized loop stability 3 high-current band switch outputs (20 mA) Software-compatible with SDA 3202 series Oxis III technology P-DSO-16-1 Type MGP 3006X6 MGP 30