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SI53361

LVCMOS Fanout Clock Buffers

SI53361 Features

* Low additive jitter: 120 fs rms

* Built-in LDOs for high PSRR performance

* Up to 12 LVCMOS Outputs from LVCMOS inputs

* Frequency range: dc to 200 MHz

* Multiple configuration options

* Dual Bank option

* 2:1 Input MUX option

* RoHS

SI53361 General Description

. . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 LVCMOS Input Termination . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Input Mux . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 Output Clock Termination Options . . . . . . . . . . . . . . . . . . . . . . ..

SI53361 Datasheet (6.26 MB)

Preview of SI53361 PDF

Datasheet Details

Part number:

SI53361

Manufacturer:

Silicon Laboratories

File Size:

6.26 MB

Description:

Lvcmos fanout clock buffers.
Si53360/61/62/65 Data Sheet Low-Jitter, LVCMOS Fanout Clock Buffers with up to 12 outputs and Frequency Range from dc to 200 MHz The Si53360/61/62/65.

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TAGS

SI53361 LVCMOS Fanout Clock Buffers Silicon Laboratories

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