* Low additive jitter: 120 fs rms
* Built-in LDOs for high PSRR performance
* Up to 12 LVCMOS Outputs from LVCMOS inputs
* Frequency range: dc to 200 MHz
* Multiple configuration options
* Dual Bank option
* 2:1 Input MUX option
* RoHS
SI53366
Silicon Laboratories
6.26 MB
Lvcmos fanout clock buffers.
Si53360/61/62/65 Data Sheet
Low-Jitter, LVCMOS Fanout Clock Buffers with up to 12 outputs and Frequency Range from dc to 200 MHz
The Si53360/61/62/65.
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