Si53360 - LVCMOS Fanout Clock Buffers

Skyworks

Datasheet Details

br> . . . . . 6 2.6 Typical Phase Noise Performance: Single-Ended Input Clock

Low additive jitter: 120 fs rms.
Built-in LDOs for high PSRR performance.
Up to 12 LVCMOS Outputs from LVCMOS inputs.
Frequency range: dc to 200 MHz.
Multiple configuration options.
Dual Bank option.
2:1 Input MUX option.
RoHS compliant, Pb-free.
Temperature range:.
40 to +85 °C VDD Power Supply Filtering CLK0 8 0 CLK1 CLK_SEL 1 6 6 VDDO (Si53361 only) OEA 8 Outputs Si53360/61 VDDOA OEA 6 Outputs 6.

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Published: Nov 14, 2023 |