TC55NEM208AFPN Datasheet (Toshiba Semiconductor) - TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TC55NEM208AFPN, TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

The TC55NEM208AFPN/AFTN is a 4,194,304-bit static random access memory (SRAM) organized as 524,288 words by 8 bits.

Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 5V ± 10% power supply.

Advanced circuit technology provides both high speed and low

TC55NEM208AFPN Features

* Low-power dissipation Operating: 15 mW/MHz (typical) Single power supply voltage of 5 V ± 10% Power down features using CE . Data retention supply voltage of 2.0 to 5.5 V Direct TTL compatibility for all inputs and outputs Wide op