TC74ACT112P Datasheet (Toshiba) - Dual J-K Flip-Flop

TC74ACT112P, Dual J-K Flip-Flop

TC74ACT112P/F TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74ACT112P, TC74ACT112F Dual J-K Flip Flop with Preset and Clear The TC74ACT112 is an advanced high speed CMOS DUAL J-K FLIP FLOP fabricated with silicon gate and double-layer metal wiring C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

This device may be used as a level converter for interfacing TTL or NMOS to High Speed C

TC74ACT112P Features

* High speed: fmax = 175 MHz (typ.) at VCC = 5 V

* Low power dissipation: ICC = 4 μA (max) at Ta = 25°C

* Compatible with TTL outputs: VIL = 0.8 V (max) VIH = 2.0 V (min)

* Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission