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UR5596 DDR TERMINATION REGULATOR

UR5596 Description

UNISONIC TECHNOLOGIES CO., LTD UR5596 DDR TERMINATION REGULATOR * .
The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of.

UR5596 Features

* Source and sink current
* Low output voltage offset
* No external resistors required
* Linear topology
* Suspend To Ram (STR) functionality
* Low external component count
* Thermal shutdown protection CMOS IC www. unisonic. com. tw Copyright © 2022 Unisonic Technologies

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Datasheet Details

Part number
UR5596
Manufacturer
UTC
File Size
351.47 KB
Datasheet
UR5596_UTC.pdf
Description
DDR TERMINATION REGULATOR

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DDR TERMINATION REGULATOR UTC
UTC UR5596-like datasheet