SN65LVDS95 Datasheet - Texas Instruments

LVDS SERDES TRANSMITTER

SN65LVDS95 Features

* 1

* 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput

* Suited for Point-to-Point Subsystem Communication With Very Low EMI

* 21 Data Channels Plus Clock in Low-Voltage TTL and 3 Data Channels Plus Clock Out Low-Voltage Differential

* Operates From a

SN65LVDS95 General Description

The SN65LVDS95 LVDS serdes (serializer/deserializer) transmitter contains three 7-bit parallel-load serial-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits of single-ended LVTTL .

SN65LVDS95 Datasheet (473.23 KB)