SN65LVDS95-Q1 Datasheet - Texas Instruments

SN65LVDS95-Q1 LVDS SERDES TRANSMITTER

ordering information The SN65LVDS95 LVDS serdes (serializer/deserializer) transmitter contains three 7-bit parallel-load serial-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits .

SN65LVDS95ĆQ1 LVDS SERDES TRANSMITTER D Qualified for Automotive Applications D 21:3 Data Channel Compression at up to 1.36 Gigabits per Second Throughput D Suited for Point-to-Point Subsystem Communication With Very Low EMI D 21 Data Channels Plus Clock in Low-Voltage TTL and 3 Data Channels Plus Clock Out Low-Voltage Differential D Operates From a Single 3.3-V Supply and 250 mW (Typ) D 5-V Tolerant Data Inputs D ’LVDS95 Has Rising Clock Edge Triggered Inputs D Bus Pins Tolerate 6-kV HBM ESD D.

SN65LVDS95-Q1 Datasheet (462.10 KB)