* a Class AB output stage to improve stability and reduce settling time. The settling time of the DAC is programmable to allow the designer to optimize speed versus power dissipation. The settling time is chosen by the control bits within the 16-bit serial input string. A high-impedance buffer is inte
TLV5616C
1.24 MB
Low power 12-bit digital-to-analog converter.
TLV5616C, TLV5616I 2.7ĆV TO 5.5ĆV LOW POWER 12ĆBIT DIGITALĆTOĆANALOG CONVERTERS WITH POWER DOWN SLAS152D DECEMBER 1997 REVISED APR.
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