US5D304 Datasheet, Translator, ultrasilicon

US5D304 Features

  • Translator
  • Two differential reference clock input pairs
  • Differential input pairs can accept the following differential input levels: LVPECL, LVDS, HCSL, HSTL or Single Ended

PDF File Details

Part number:

US5D304

Manufacturer:

ultrasilicon

File Size:

940.95kb

Download:

📄 Datasheet

Description:

4-output ultra-low additive jitter differential clock buffer/level translator. The US5D304 is a 2.1-GHz,4-output differential high-performance clock fanout buffer. The input clock can be selected from two differe

Datasheet Preview: US5D304 📥 Download PDF (940.95kb)
Page 2 of US5D304 Page 3 of US5D304

US5D304 Application

  • Applications
  • Clock distribution and level translation for ADCs, DACs, Multi- Gigabit Elthernet, XAUI, Fibre channel, SATA/SAS, SONET/SDH,C

TAGS

US5D304
4-Output
Ultra-Low
Additive
Jitter
Differential
Clock
Buffer
Level
Translator
ultrasilicon

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