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US5D304 - 4-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator

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US5D304 4-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator by ultrasilicon - Datasheet Preview — Datasheet preview – US5D304

Datasheet Details

Part number	US5D304
Manufacturer	ultrasilicon
File Size	940.95 KB
Description	4-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator
Datasheet	US5D304 Datasheet
Additional preview pages of the US5D304 datasheet.

Product details

Description

The US5D304 is a 2.1-GHz,4-output differential high-performance clock fanout buffer.

Features

Two differential reference clock input pairs.
Differential input pairs can accept the following differential input levels: LVPECL, LVDS, HCSL, HSTL or Single Ended.
Crystal Input accepts 10MHz to 40MHz Crystal or Single Ended Clock.
Maximum Output Frequency LVPECL - 2.1GHz LVDS - 2.1GHz HCSL - 250MHz LVCMOS - 250MHz.
Four differential output pairs that can be configured as LVPECL or LVDS or HCSL or HiZ.
One single-ended reference output with.

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Other Datasheets by ultrasilicon

US5D308 - 8-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator

Published: Dec 15, 2024 |