US5D304 Datasheet - ultrasilicon

US5D304 4-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator

The US5D304 is a 2.1-GHz,4-output differential high-performance clock fanout buffer. The input clock can be selected from two differential inputs or one crystal input. The selected input clock is distributed to two banks of 2 differential outputs and one LVCMOS output. Output banks can be configured.

US5D304 Features

* Two differential reference clock input pairs

* Differential input pairs can accept the following differential input levels: LVPECL, LVDS, HCSL, HSTL or Single Ended

* Crystal Input accepts 10MHz to 40MHz Crystal or Single Ended Clock

* Maximum Output Frequency LVPEC

US5D304-ultrasilicon.pdf