US5D308 Datasheet, Translator, ultrasilicon

✔ US5D308 Features

Two differential reference clock input pairs
Differential input pairs can accept the following differential input levels: LVPECL, LVDS, HCSL, HSTL or Single Ended
C

✔ US5D308 Application

Clock distribution and level translation for ADCs, DACs, Multi- Gigabit Elthernet, XAUI, Fibre channel, SA

PDF File Details

Part number:

US5D308

Manufacturer:

ultrasilicon

File Size:

912.42 KB

Download:

📄 Datasheet

Description:

8-output ultra-low additive jitter differential clock buffer/level translator. The US5D308 is a 2.1-Ghz,8-output differential high-performance clock fanout buffer. The input clock can be selected from two differe

📥 Download PDF (912.42 KB)

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US5D308 8-Output Ultra-Low Additive Jitter Differential Clock Buffer Level Translator ultrasilicon