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MT5C6404 Datasheet PDF

ASI MT5C6404

The Austin Semiconductor SRAM family employs high-speed, low-power CMOS designs using a four-transistor memory cell. For flexibility in high-speed memory applications, Austin Semiconductor offers chip enable (CE\) on all organizations.
Part No. MT5C6404
Datasheet MT5C6404 Download
Manufacturer
ASI
Description 16K x 4 SRAM SRAM MEMORY ARRAY
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MT5C6404 datasheet page 1 preview

FEATURES

● Speeds: 12, 15, 20, 25, 35, 45, 55, and 70ns
● Battery Backup: 2V data retention
● High-performance, low-power CMOS double-metal process
● Single +5V (+10%) Power Supply
● Easy memory expansion with CE\
● All inputs and outputs are TTL compatible

GENERAL DESCRIPTION

Austin Semiconductor SRAMs are fabricated using double-layer metal, double-layer polysilicon technology. This enhancement can place the outputs in High-Z for additional flexibility in system design. Writing to these devices is accomplished when write enable (WE\) and CE\ inputs are both LOW. Reading is accomplished when WE\ remains HIGH and CE\ goes LOW. The device offers a reduced power standby mode when disabled. This allows system designs to achieve low standby power requirements. All devices operate from a single +5V power supply and all inputs and outputs are fully TTL compatible. OPTIONS
● Timing 12ns access 15ns access 20ns access 25ns access 35ns access 45ns access 55ns access 70ns access
● Package(s) Ceramic DIP (300 mil) MARKING -12 -15 -20 -25 -35 -45* -55* -70* C No.
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