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AS7C251MFT18A - 2.5V 1M x 18 flowthrough burst synchronous SRAM

General Description

The AS7C251MFT18A is a high-performance CMOS 16-Mbit synchronous Static Random Access Memory (SRAM) device organized as 1,048,576 words x18 bits.

Fast cycle times of 8.5/10/12 ns with clock access times (tCD) of 7.5/8.5/10 ns.

Three chip enable (CE) inputs permit easy memory expansion.

Key Features

  • Organization: 1,048,576 words x18 bits Fast clock to data access: 7.5/8.5/10 ns Fast OE access time: 3.5/4.0 ns Fully synchronous flow-through operation Asynchronous output enable control Available 100-pin TQFP package.
  • Individual byte write and global write Multiple chip enables for easy expansion 2.5V core power supply Linear or interleaved burst control Snooze mode for reduced power-st.

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Datasheet Details

Part number AS7C251MFT18A
Manufacturer Alliance Semiconductor Corporation
File Size 557.29 KB
Description 2.5V 1M x 18 flowthrough burst synchronous SRAM
Datasheet download datasheet AS7C251MFT18A Datasheet

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Other Datasheets by Alliance Semiconductor Corporation

Part Number Description
AS7C251MFT32A (AS7C251MFT32A / AS7C251MFT36A) 2.5V 1M x 32/36 Flow-through synchronous SRAM
AS7C251MFT36A (AS7C251MFT32A / AS7C251MFT36A) 2.5V 1M x 32/36 Flow-through synchronous SRAM
AS7C251MNTD18A 2.5V 1M x 18 Pipelined SRAM
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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December 2004 ® AS7C251MFT18A 2.5V 1M x 18 flowthrough burst synchronous SRAM Features • • • • • • Organization: 1,048,576 words x18 bits Fast clock to data access: 7.5/8.5/10 ns Fast OE access time: 3.5/4.0 ns Fully synchronous flow-through operation Asynchronous output enable control Available 100-pin TQFP package • • • • • Individual byte write and global write Multiple chip enables for easy expansion 2.5V core power supply Linear or interleaved burst control Snooze mode for reduced power-standby www.DataSheet4U.