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PROCESS
Small Signal Transistor
CP323
Central
TM
NPN - Darlington Transistor Chip
Semiconductor Corp.
PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area
www.DataSheet4U.com
EPITAXIAL PLANAR 26.8 x 26.8 MILS 9.0 MILS 4.2 x 4.2 MILS 4.3 x 4.3 MILS Al Au - 18,000Å
Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY
GROSS DIE PER 4 INCH WAFER 15,900 PRINCIPAL DEVICE TYPES BSS52 BST52
145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com
R1 (1-August 2002)
Central
TM
PROCESS
CP323
Semiconductor Corp.
Typical Electrical Characteristics
www.DataSheet4U.com
145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.