CY2300 - Phase-Aligned Clock Multiplier

Product Overview

Cypress Semiconductor

Datasheet Details

Part number	CY2300
Manufacturer	Cypress Semiconductor
File Size	347.89 KB
Description	Phase-Aligned Clock Multiplier
Datasheet	CY2300 Datasheet
Additional preview pages of the CY2300 datasheet.

Product details

Description

The CY2300 is a four output 3.3 V phase-aligned system clock designed to distribute high-speed clocks in PC, workstation, datacom, telecom, and other high-performance applications.

Features

10 MHz to 166.67 MHz output operating range.
Four-multiplier configuration.
Single PLL architecture.
Phase aligned outputs.
Low jitter, high accuracy outputs.
Output enable pin.
3.3 V operation.
5 V tolerant input.
Internal loop filter.
8-pin 150-mil small-outline integrated circuit (SOIC) package.
Commercial temperature Functional.

📁 Similar Datasheet

CY2304 - 3.3V Zero Delay Buffer (Cypress)
CY2304NZ - Four Output PCI-X and General Purpose Buffer (Cypress)
CY2305 - Low Cost 3.3 V Zero Delay Buffer (Cypress)
CY2308 - 3.3V Zero Delay Buffer (Cypress)
CY2309 - Low Cost 3.3 V Zero Delay Buffer (Cypress)
CY23EP05 - 5 Output Zero Delay Buffer (Cypress)
CY23EP09 - Nine-Output Zero Delay Buffer (Cypress)
CY23FP12 - 200MHz Field Programmable Zero Delay Buffer (Cypress)

Other Datasheets by Cypress Semiconductor

CY2302 - Frequency Multiplier and Zero Delay Buffer
CY2303 - Phase-Aligned Clock Multiplier
CY2305C - Zero Delay Buffers
CY2309C - Zero Delay Buffers
CY2313ANZ - 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs
CY2318ANZ - 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs

Published: Mar 11, 2017 |